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w91520n series tone/pulse dialer with handfree and hold functions publication release date: may 1997 - 1 - revision a3 general description the w91520n series are si-gate cmos ics that provide the necessary signals for tone or pulse dialing. the w91520n series provide one-key redial, handfree dialing, hold, save, and redial functions. features dtmf/pulse switchable dialer two by 32-digit redial and save memory pulse-to-tone (*/t) keypad for long distance call operation uses 5 5 keyboard easy operation with redial, flash, pause, and */t keypads pause, pulse-to-tone (*/t) can be stored as a digit in memory on-hook debounce time: 150 ms dialing rate (10 pps, or 20 pps) selectable by bonding option minimum tone output duration: 93 msec. minimum intertone pause: 93 msec. flash break time (73, 100, 300, 600 msec.) selectable by keypad; pause time is 1.0 sec. on-chip power-on reset uses 3.579545 mhz crystal or ceramic resonator packaged in 18 or 20-pin plastic dip the different dialers in the w91520n series are shown in the following table: type no. replacement type no. pulse (pps) flash (ms) m/b handfree dialing package (pins) w91520n w91520 10 600/100/300/73 pin - 18 w91521n w91521 20 600/100/300/73 pin - 18 w91520an w91520a 10 600/100/300/73 pin yes 20 w91521an w91521a 20 600/100/300/73 pin yes 20
w91520n series - 2 - pin configurations c4 1 2 3 4 5 6 7 8 9 10 hks dtmf mode r4 r3 r2 r1 v dd 13 18 20 19 17 16 15 14 12 11 hfo w91520an/w91521an c1 c2 c3 ss v xt xt t/p mute hfi h/p mute dp/c5 w91520n/w91521n 1 2 3 4 5 6 7 8 9 hks dtmf mode r4 r3 r2 r1 v dd 12 18 17 16 15 14 10 11 13 c1 c2 c3 c4 ss v xt xt t/p mute h/p mute dp/c5 pin description symbol 18-pin 20-pin i/o function column- row inputs 1 - 4 & 15 - 18 1 - 4 & 17 - 20 i the keyboard inputs may be used with either a standard 5 5 keyboard or an inexpensive single contact (form a) keyboard. electronic input from a m c can also be used. a valid key-in is defined as a single row being connected to a single column. xt, xt 7, 8 7, 8 i, o a built-in inverter provides oscillation with an inexpensive 3.579545 mhz crystal or ceramic resonator. t/p mute 99o the t/p mute is a conventional cmos n-channel open drain output. the output transistor is switched on during dialing sequence, one-key redial break, and flash break time. otherwise, it is switched off. mode 13 15 i pulling mode pin to v ss places the dialer in tone mode. pulling mode pin to v dd places the dialer in pulse mode (10 pps; 20 pps for w91521n/521an, m/b = 40:60). floating mode pin places the dialer in pulse mode (10 pps; 20 pps for w91521n/521an, m/b = 33.3:66.7).
w91520n series publication release date: may 1997 - 3 - revision a3 pin description, continued symbol 18-pin 20-pin i/o function hks 10 12 i hook switch input. hks = v dd : on-hook state. chip in sleeping mode, no operation. hks = v ss : off-hook state. chip is enabled for normal operation. hks pin is pulled to v dd by internal resistor. dp / c5 11 13 o n-channel open drain dialing pulse output. flash key will cause dp to be active in either tone mode or pulse mode. the timing diagram for pulse mode is shown in figure 1(a, b, c). v dd , v ss 14, 6 16, 6 i power input pins. h/p mute 5 5 o the h/p mute is a conventional inverter output. during pulse dialing, flash break, one-key redial break, and hold period, this output is active high; otherwise, it remains in low state. dtmf 12 14 o in pulse mode, this pin remains in low state at all times. in the tone mode, it will output a dual or single tone. detailed timing diagram for tone mode is shown in figure 2(a, b, c). specified actual error % output frequency r1 r2 r3 r4 c1 c2 c3 697 770 852 941 1209 1336 1477 699 766 848 948 1216 1332 1472 +0.28 -0.52 -0.47 +0.74 +0.57 -0.30 -0.34
w91520n series - 4 - pin description, continued symbol 18-pin 20-pin i/o function hfi, hfo - 10, 11 i, o handfree control pins. the handfree control state is toggled on by a low pulse on the hfi input pin. the status of the handfree control state is described in the following table: current state input hfo dialing high yes on hook high low no off hook high low yes on hook off hook low yes off hook low on hook low no off hook high on hook high yes low hook sw. hfo next state hfi hfi hfi hfi pin is pulled to v dd by an internal resistor. detailed timing diagrams are shown in figure 3. block diagram row column dtmf xt xt ram counter system clock generator location latch d/a row & column programmable counter data latch & decoder read/write (r1 to r4, vx) (c1 to c4) t/p mute hfo control logic pulse control logic keyboard interface converter mode hks hfi dp/c5 h/p mute
w91520n series publication release date: may 1997 - 5 - revision a3 functional description keyboard operation c1 c2 c3 c4 dp c5 / 1 2 3 save r1 456f1 r2 789f2 h r3 * /t 0 # r/p1 r r4 r/p2 r f3 f4 v x r/p1, r/p2: redial and pause function key; p1 is 3.6 sec. and p2 is 2.0 sec. * /t: * in tone mode and p ? t in pulse mode f1, ..., f4: flash keys, flash break time of f1 = 600 ms, f2 = 100 ms, f3 = 300 ms, f4 = 73 ms h: hold function key save: save function key r: one-key redial function notes: d1, ..., dn, d1', ..., dn': 0, ..., 9, */t, # r/p: r/p1 or r/p2. fn: f1, ..., f4 normal dialing off hook (or on hook & hfi ?? ), d1 , d2 , ..., dn 1. d1, d2, ..., dn will be dialed out. 2. dialing length is unlimited, but redial is inhibited if length exceeds 32 digits in normal dialing. redialing 1. off hook (or on hook & hfi ?? ), d1 , d2 , ..., dn , busy, come on hook , off hook (or on hook & hfi ?? ), r/p a. the redial memory content will be dialed out. b. the r/p key can execute the redial function only as the first key-in after off-hook; otherwise, it executes pause function. c. if redialing length exceeds 32 digits, the redialing function will be inhibited. 2. off hook (or on hook & hfi ?? ), d1 , d2 , ..., dn , busy, r a. the one-key redialing function timing diagram is shown in figure 4.
w91520n series - 6 - b. if the dialing of d1 to dn is finished, pressing the r key will cause the pulse output pin to go low for 2.2 seconds break time and 0.6 seconds pause time will automatically be added. c. if the pulses of the dialed digits d1 to dn have not finished, r will be ignored. d. the redial function by r key has no break time (2.2 sec.) if it is the first key-in after off-hook. e. the r key uses the same redial buffer as the redial function by the r/p1 or r/p2 key, and it is active during normal dialing or repertory dialing. access pause off hook (or on hook & hfi ?? ), d1 , d2 , r/p , d3 , ..., dn 1. the pause function is executed in normal dialing, redial dialing, or memory dialing. 2. the pause duration of 2.0 or 3.6 seconds per pause is selected by keypad, but only one pause time can be stored in memory 3. a detailed timing diagram for the pause function is shown in figure 5. pulse-to-tone (*/t) off hook (or on hook & hfi ?? ), d1 , d2 , ..., dn , */t , d1' , d2' , ..., dn' 1. if the mode switch is set to pulse mode, then the output signal will be: d1, d2, ..., dn, pause (2.0 sec. or 3.6 sec.), d1', d2', ..., dn' (pulse) (tone ) 2. if the mode switch is set to tone mode, then the output signal will be: d1, d2, ..., dn, *, d1', d2', ..., dn' (tone) (tone) 3. the dialer remains in tone mode when the digits have been dialed out and can be reset to pulse mode only by going on-hook. 4. the pulse-to-tone function timing diagram is shown in figure 6. save off hook (or on hook & hfi ?? ), d1 , d2 , ..., dn , save 1. d1, d2, ..., dn will be dialed out. 2. if the sequence of the dialed digits d1, d2, ..., dn has not finished, save will be ignored; otherwise, d1, d2, ..., dn will be duplicated to the save memory.
w91520n series publication release date: may 1997 - 7 - revision a3 flash off hook (or on hook & hfi ?? ), fn 1. fn = f1, ..., f4 2. the dialer will execute a flash break time of 600 ms (f1), 100 ms (f2), 300 ms (f3), or 73 ms (f4). in each case the flash pause time is 1.0 sec. before the next digit is dialed out. 3. flash key cannot be stored as a digit in memory. the flash key has first priority among the keyboard functions. 4. the system will return to the initial state after the flash pause time is finished. 5. the flash function timing diagram is shown in figure 7. hold off hook (or on hook & hfi ?? ), h the hold is switched on and off by hold key. the other keypads will be disabled when in hold mode. the function timing diagram is shown in figure 3(a, b, c). absolute maximum ratings parameter symbol rating unit dc supply voltage v dd - v ss -0.3 to +7.0 v input/output voltage v il v ss -0.3 v v ih v dd +0.3 v v ol v ss -0.3 v v oh v dd +0.3 v power dissipation p d 120 mw operation temperature t opr -20 to +70 c storage temperature t stg -55 to +150 c note: exposure to conditions beyond those listed under absolute maximum ratings may adversely affect the life and reliability o f the device.
w91520n series - 8 - dc characteristics (v dd - v ss = 2.5v, f osc. = 3.579545 mhz, t a = 25 c, all outputs unloaded) parameter symbol conditions min. typ. max. unit operating voltage v dd - 2.0 - 5.5 v operating current i op tone, unloaded - 0.4 0.6 ma pulse, unloaded - 0.2 0.4 standby current i sb hks = v ss , no load & no key entry --15 m a memory retention current i mr hks = v dd , v dd = 1.0v - - 0.2 m a dtmf output voltage v to row group, r l = 5 k w 130 150 170 mvrms pre-emphasis col/row, v dd = 2.0 to 5.5v 12 3 db dtmf distortion thd r l = 5 k w , v dd = 2.0 to 5.5v - -30 -23 db dtmf output dc level v tdc r l = 5 k w , v dd = 2.0 to 5.5v 1.0 - 3.0 v dtmf output sink current i tl v to = 0.5v 0.2 - - ma dp output sink current i pl v po = 0.5v 0.5 - - ma t/p mute output sink current i tml v tmo = 0.5v 0.5 - - ma h/p mute output i hph v hph = 2.0v 0.5 - - ma drive/sink current i hpl v hpl = 0.5v 0.5 - - ma hfo drive/sink current i hfh v hfh = 2.0v 0.5 - - ma i hfl v hfl = 0.5v 0.5 - - ma keypad input drive current i kd v i = 0.0v 30 - - m a keypad input sink current i ks v i = 2.5v 200 400 - m a hks i/p pull-high resistor r hk - - 300 - k w keypad resistance r k - --5 k w
w91520n series publication release date: may 1997 - 9 - revision a3 ac characteristics (v dd - v ss = 2.5v, f osc. = 3.579545 mhz, t a = 25 c, all outputs unloaded) parameter symbol conditions min. typ. max. unit key-in debounce t kid --20-ms key release debounce t krd --20-ms on-hook debounce t ohd - - 150 - ms pre-digit pause 1 t pdp1 mode = v dd -40 -ms 10 pps mode = floating - 33.3 - pre-digit pause 2 t pdp2 mode = v dd -20 -ms 20 pps mode = floating - 16.7 - interdigit pause t idp 10 pps - 800 - ms (auto dialing) 20 pps - 500 - make/break ratio m:b mode = v dd - 40:60 - % mode = floating - 33.3:66.7 - tone output duration t td auto dialing - 93 - ms intertone pause t itp auto dialing - 93 - ms flash break time t fb f1 - 600 - f2 - 100 - ms f3 300 f4 - 73 - flash pause time t fp f1, f2, f3, f4 - 1.0 - s pause time t p r/p1 - 3.6 - s r/p2 - 2.0 - one-key redial break time t rb - - 2.2 - s one-key redial pause time t rp - - 600 - ms notes: 1. crystal parameters suggested for proper operation are rs < 100 w , lm = 96 mh, cm = 0.02 pf, cn = 5 pf, cl = 18 pf, f osc . = 3.579545 mhz 0.02%. 2. crystal oscillator accuracy directly affects these times.
w91520n series - 10 - timing waveforms t idp hks key in dp h/p mute t/p mute 2 b m t idp t idp t kid t idp t pdp 2 mb 4 t krd 3 t kid dtmf osc. low oscillation oscillation t pdp figure 1(a) normal dialing timing diagram hks key in dp t/p mute r/p t kid b m t idp t idp t pdp mb dtmf osc. low oscillation t idp t krd h/p mute t< t ohd figure 1(b) pulse mode auto dialing timing diagram
w91520n series publication release date: may 1997 - 11 - revision a3 timing waveforms, continued hks key in dp h/p mute r/p t kid b m t idp t pdp m b dtmf osc. low oscillation t krd t = t ohd t/p mute figure 1(c) pulse mode auto dialing timing diagram hks key in t/p mute dtmf 5 4 3 t td osc. dp oscillation 2 t itp t itp t kid high t itp osc illati o n t krd h/p mute figure 2(a) tone mode normal dialing timing diagram
w91520n series - 12 - timing waveforms, continued hks key in t/p mute dtmf r/p t krd osc. dp oscillation t td t itp t itp t kid high h/p mute t < t ohd figure 2(b) tone mode auto dialing timing diagram hks key in t/p mute dtmf r/p t krd osc. dp oscillation t td t itp t kid high h/p mute t = t ohd figure 2(c) tone mode auto dialing timing diagram
w91520n series publication release date: may 1997 - 13 - revision a3 timing waveforms, continued 12 hks key in h mode dp dtmf hh h h mute h/p mute hfi hfo osc t/p figure 3. handfree function timing diagram
w91520n series - 14 - timing waveforms, continued hks key in dp h/p mute dtmf osc. low oscillation r r kid t b m t pdp t idp t rb t rp t idp hfi hfo kid t m t pdp b t/p mute figure 4. one-key redial timing diagram hks key in dp t/p mute dtmf osc. low osc 2 t kid r/p 3 b m t pdp m t idp b t pdp h/p mute t p figure 5. pause function timing diagram
w91520n series publication release date: may 1997 - 15 - revision a3 timing waveforms, continued hks key in dp t/p mute dtmf osc. oscillation 2 t kid */t 3 b m t pdp t idp h/p mute t p figure 6. pulse-to-tone timing diagram h/p mute t/p mute f f hks t kid dtmf osc. dp key in low 3 t fb f t kid t kid t itp oscillation hfi hfo t fb t fp figure 7. flash timing diagram
w91520n series - 16 - headquarters no. 4, creation rd. iii, science-based industrial park, hsinchu, taiwan tel: 886-3-5770066 fax: 886-3-5792766 http://www.winbond.com.tw/ voice & fax-on-demand: 886-2-27197006 taipei office 11f, no. 115, sec. 3, min-sheng east rd., taipei, taiwan tel: 886-2-27190505 fax: 886-2-27197502 winbond electronics (h.k.) ltd. rm. 803, world trade square, tower ii, 123 hoi bun rd., kwun tong, kowloon, hong kong tel: 852-27513100 fax: 852-27552064 winbond electronics north america corp. winbond memory lab. winbond microelectronics corp. winbond systems lab. 2727 n. first street, san jose, ca 95134, u.s.a. tel: 408-9436666 fax: 408-5441798 note: all data and specifications are subject to change without notice.

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